# HG changeset patch
# User Matt Mackall <mpm@selenic.com>
# Date 1249941526 18000
# Node ID 312d5194b3dcaf8340b15c41faf560842f140c55
# Parent  0486c1bf2100a720da7b2ce9ddf46ba9453baf0a
imported patch comcerto-common

diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/comcerto-common.c
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/comcerto-common.c	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,278 @@
+/*
+ *  linux/arch/arm/mach-comcerto/comcerto-common.c
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <mach/hardware.h>
+#include <mach/comcerto-timers.h>
+/*
+ * HARDWARE TIMER
+ * Can be use by any driver for its own need
+ */
+
+#define COMCERTO_TIMER_DEBUG	1
+#define TIMER_STATUS_ENABLED	(1 << 0)
+#define TIMER_STATUS_FREE		(1 << 1)
+#define COMCERTO_MAX_TIMERS	4
+
+spinlock_t timer_lock;
+
+/* List of available timers */
+struct timer_hw {
+	u8 id;
+	u8 status;
+	struct comcerto_timer *t;
+};
+struct timer_hw timer_hw [COMCERTO_MAX_TIMERS] = {
+	{0, 0, NULL},
+	{1, 0, NULL},
+	{2, TIMER_STATUS_FREE, NULL},
+	{3, TIMER_STATUS_FREE, NULL}
+};
+
+
+
+static unsigned long __timer_get(int id)
+{
+	if (id == 2)
+	{
+		return comcerto_timer2_get();
+	}
+	else if (id == 3)
+	{
+		return comcerto_timer3_get();
+	}
+	else
+		return 0;
+}
+
+static void __timer_start(struct timer_hw *thw, unsigned long count)
+{
+	thw->status |= TIMER_STATUS_ENABLED;
+
+	if (thw->id == 2)
+	{
+		comcerto_timer2_set(0, count, 0);
+	}
+	else if (thw->id == 3)
+	{
+		comcerto_timer3_set(0, count, 0);
+	}
+	else
+		goto out;
+
+	comcerto_timer_enable(thw->id);
+
+  out:
+	return;
+}
+
+static void timer_start(struct timer_hw *thw, unsigned long count)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&timer_lock, flags);
+	__timer_start(thw, count);
+	spin_unlock_irqrestore(&timer_lock, flags);
+}
+
+static void __timer_stop(struct timer_hw *thw)
+{
+	comcerto_timer_disable(thw->id);
+	thw->status &= ~ TIMER_STATUS_ENABLED;
+}
+
+static void timer_stop(struct timer_hw *thw)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&timer_lock, flags);
+	__timer_stop(thw);
+	spin_unlock_irqrestore(&timer_lock, flags);
+}
+
+static void __timer_free(struct timer_hw *thw)
+{
+	thw->status |= TIMER_STATUS_FREE;
+	thw->t->thw = (unsigned long) NULL;
+	thw->t = NULL;
+}
+
+static void timer_free(struct timer_hw *thw)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&timer_lock, flags);
+	__timer_free(thw);
+	spin_unlock_irqrestore(&timer_lock, flags);
+}
+
+
+static struct timer_hw *__timer_alloc(struct comcerto_timer *t)
+{
+	struct timer_hw *thw;
+	int i;
+
+	for (i = 0; i < COMCERTO_MAX_TIMERS; i++)
+	{
+		thw = &timer_hw[i];
+		if (thw->status & TIMER_STATUS_FREE)
+		{
+			thw->status &= ~ TIMER_STATUS_FREE;
+			t->thw = (unsigned long) thw;
+			thw->t = t;
+			goto found;
+		}
+	}
+
+	return NULL;
+found:
+	return thw;
+}
+
+static struct timer_hw *timer_alloc(struct comcerto_timer *t)
+{
+	struct timer_hw *thw;
+	unsigned long flags;
+
+	spin_lock_irqsave(&timer_lock, flags);
+	thw = __timer_alloc(t);
+	spin_unlock_irqrestore(&timer_lock, flags);
+
+	return thw;
+}
+
+int comcerto_timer_start(struct comcerto_timer *t)
+{
+	struct timer_hw *thw;
+
+	thw = (struct timer_hw *) t->thw;
+	if (!thw) {
+		thw = timer_alloc(t);
+		if (!thw) {
+			printk (KERN_ERR "Comcerto timer: unable to allocate hardware timer\n");
+			goto err;
+		}
+	}
+#ifdef COMCERTO_TIMER_DEBUG
+	if (thw->t != t) {
+		printk (KERN_ERR "Comcerto timer: timer corruption %#lx %#lx %#lx\n",
+					(unsigned long) thw, (unsigned long) thw->t, (unsigned long) t);
+
+		goto err;
+	}
+#endif /* COMCERTO_TIMER_DEBUG */
+
+	/* timeout in us */
+	timer_start(thw, t->timeout * COMCERTO_AHBCLK);
+
+	return 0;
+
+  err:
+	return -1;
+}
+
+int comcerto_timer_stop(struct comcerto_timer *t)
+{
+	struct timer_hw *thw;
+
+	thw = (struct timer_hw *) t->thw;
+	if (!thw)
+		goto err;
+
+#ifdef COMCERTO_TIMER_DEBUG
+	if (thw->t != t) {
+		printk (KERN_ERR "Comcerto timer: timer corruption %#lx %#lx %#lx\n",
+					(unsigned long) thw, (unsigned long) thw->t, (unsigned long) t);
+
+		goto err;
+	}
+#endif /* COMCERTO_TIMER_DEBUG */
+
+	timer_stop(thw);
+	timer_free(thw);
+
+	return 0;
+
+  err:
+	return -1;
+}
+
+int comcerto_timer_read(struct comcerto_timer *t)
+{
+	struct timer_hw *thw;
+
+	thw = (struct timer_hw *) t->thw;
+	if (!thw)
+		goto err;
+
+#ifdef COMCERTO_TIMER_DEBUG
+	if (thw->t != t) {
+		printk (KERN_ERR "Comcerto timer: timer corruption %#lx %#lx %#lx\n",
+					(unsigned long) thw, (unsigned long) thw->t, (unsigned long) t);
+
+		goto err;
+	}
+#endif /* COMCERTO_TIMER_DEBUG */
+
+	return __timer_get(thw->id) / COMCERTO_AHBCLK;
+
+  err:
+	return -1;
+}
+
+EXPORT_SYMBOL(comcerto_timer_start);
+EXPORT_SYMBOL(comcerto_timer_stop);
+EXPORT_SYMBOL(comcerto_timer_read);
+
+
+
+
+int timer_hw_handler(u8 id)
+{
+	struct timer_hw *thw;
+	unsigned long flags;
+
+	thw = &timer_hw[id];
+
+	spin_lock_irqsave(&timer_lock, flags);
+
+	if (thw->status & TIMER_STATUS_ENABLED) {
+
+		if (thw->t->flags & COMCERTO_TIMER_RUN_ONCE) {
+			__timer_stop(thw);
+			__timer_free(thw);
+		}
+
+		spin_unlock_irqrestore(&timer_lock, flags);
+
+		thw->t->func(thw->t->data);
+
+	} else {
+		spin_unlock_irqrestore(&timer_lock, flags);
+		goto err;
+	}
+
+	return 0;
+	
+  err:
+	return -1;
+}
+
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/comcerto-common.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/comcerto-common.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,114 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/comcerto-common.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#error "Do not include this directly, instead #include <mach/hardware.h>"
+#endif
+
+#ifndef __ASM_COMCERTO_COMMON_H__
+#define __ASM_COMCERTO_COMMON_H__
+
+#include <asm/types.h>
+
+/*
+ * VIRTUAL ADDRESS MAPPING
+ */
+/* VA of IO on APB bus */
+#define APB_VADDR_BASE			0xe0000000
+#define SDRAM_MSP_MEMORY_VADDR		0xf0000000
+#define COMCERTO_PCI_MEM_VBASE		0xf1000000
+#define COMCERTO_PCI_IO_VBASE		0xf7000000
+#define ERAM_MEMORY_VADDR		0xf8000000
+#define IRAM_MEMORY_VADDR		0xf9000000
+#define ARAM_MEMORY_VADDR		0xfa000000
+#define COMCERTO_L2CC_VADDR_BASE	0xfa0a0000
+#define COMCERTO_IPSEC_VADDR_BASE	0xfe000000
+
+/* macro to get virtual address of IO on APB Bus from Physical address*/
+#define APB_VADDR(x)		((x) - APB_PADDR_BASE + APB_VADDR_BASE)
+
+#define IO_SPACE_LIMIT          (PCIBIOS_MIN_IO + 0xffff)
+
+#define COMCERTO_PCI_IO_BASE	PCIBIOS_MIN_IO
+#define COMCERTO_PCI_IO_SIZE	(IO_SPACE_LIMIT - PCIBIOS_MIN_IO)
+
+#define COMCERTO_PCI_MEM_BASE	PCIBIOS_MIN_MEM
+#define COMCERTO_PCI_MEM_SIZE	0x05ffffff
+#define PCIMEM_BASE		COMCERTO_PCI_MEM_VBASE
+
+
+/*
+ * GPIO
+ */
+/* Return GPIO mask from GPIO number*/
+#define comcerto_gpio_mask(gpio_number)		(1 << (gpio_number))
+
+/* Set gpio pins specified by gpiomask to be outputs */
+#define comcerto_gpio_enable_output(gpiomask)	\
+		__raw_writel(__raw_readl(COMCERTO_GPIO_OE_REG) | (gpiomask), \
+		COMCERTO_GPIO_OE_REG)
+
+/* Set output pins specified by gpiomask to low */
+#define comcerto_gpio_set_0(gpiomask)	\
+		__raw_writel(__raw_readl(COMCERTO_GPIO_OUTPUT_REG) \
+		& ~(gpiomask), COMCERTO_GPIO_OUTPUT_REG)
+
+/* Set output pins specified by gpiomask to high */
+#define comcerto_gpio_set_1(gpiomask)	\
+		__raw_writel(__raw_readl(COMCERTO_GPIO_OUTPUT_REG) | \
+		(gpiomask), COMCERTO_GPIO_OUTPUT_REG)
+
+/* Read status of input pins specified by gpiomask */
+#define comcerto_gpio_read(gpiomask)	\
+		(__raw_readl(COMCERTO_GPIO_INPUT_REG) & (gpiomask))
+
+/* a combined ack for all GPIOs */
+#define comcerto_gpio_ack_int(gpiomask)	\
+		__raw_writel((gpiomask), COMCERTO_INTC_STATUS_REG_0)
+
+
+#define comcerto_gpio_ctrl(value, mask)	do { \
+	u32 status; \
+	while (((status = __raw_readl(COMCERTO_GPIO_IOCTRL_REG)) & \
+		(mask)) != (value)) { \
+		__raw_writel(0x55555555, COMCERTO_GPIO_LOCK_REG);  \
+		__raw_writel((status & ~(mask)) | \
+			(value), COMCERTO_GPIO_IOCTRL_REG); } \
+	} while (0)
+
+/*
+ * PROCESSORS AND BUS
+ */
+#define comcerto_get_arm_clk()		\
+	((REFCLKFREQ * (__raw_readl(COMCERTO_PLL_ARM_REG) & 0x3F)) >> 1)
+#define comcerto_get_amba_clk()		\
+	((REFCLKFREQ * (__raw_readl(COMCERTO_PLL_AMBA_REG) & 0x3F)) >> 2)
+#define comcerto_set_arm_clk(mult)	\
+	(__raw_writel(2 * (mult) / REFCLKFREQ, COMCERTO_PLL_ARM_REG))
+#define comcerto_set_amba_clk(mult)	\
+	(__raw_writel(0x04000000 | (4 * (mult) / REFCLKFREQ), \
+					COMCERTO_PLL_AMBA_REG))
+
+#define comcerto_asb_arbitration(arbitration_mask) 	\
+	__raw_writel(__raw_readl(COMCERTO_ASA_TC_CR_REG) | \
+			(arbitration_mask), COMCERTO_ASA_TC_CR_REG)
+
+
+#endif
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/comcerto-devices.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/comcerto-devices.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,81 @@
+/*
+ *  linux/include/mach/comcerto-devices.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_COMCERTO_DEVICES_H__
+#define __ASM_COMCERTO_DEVICES_H__
+
+#include <linux/phy.h>
+
+#define CONFIG_COMCERTO_USE_MII			1
+#define CONFIG_COMCERTO_USE_RMII		2
+#define CONFIG_COMCERTO_USE_GMII		4
+#define CONFIG_COMCERTO_USE_RGMII		8
+
+/* GEMAC configured by SW */
+#define GEMAC_SW_CONF		((1 << 8) | (1 << 11))
+/* GEMAC configured by phy lines (not for MII/GMII) */
+#define GEMAC_PHY_CONF		0
+#define GEMAC_SW_FULL_DUPLEX	(1 << 9)
+#define GEMAC_SW_SPEED_10M	(0 << 12)
+#define GEMAC_SW_SPEED_100M	(1 << 12)
+#define GEMAC_SW_SPEED_1G	(2 << 12)
+
+/* set if a GIg phy available */
+#define GEMAC_PHY_1000			1
+/* set if no phy connected to MAC (ex ethernet switch).
+ * In this case use MAC fixed configuration */
+#define GEMAC_NO_PHY			2
+#define GEMAC_PHY_RGMII_ADD_DELAY 	4
+
+struct comcerto_eth_platform_data {
+	char name[16];
+	/* board specific information */
+	u32 mii_config;
+	u32 gemac_mode;
+	u32 phy_flags;
+	u32 gem_id;
+	char  bus_id[MII_BUS_ID_SIZE];
+	u32 phy_id;
+	u8 *mac_addr;
+};
+
+struct comcerto_mdio_data {
+	int irq[32];
+	u32 phy_mask;
+};
+
+/* L210 cache controller value
+     Configure Aux:
+       [11:9]=[8:6]=[2:0]=001 RAM LAT = 2 cycles
+       [5:3]=000    Data write latency is 1
+       [12]=0       WRAP access is enabled
+       [16:13]=1000 8-way cache
+       [19:17]=001  16KB way
+       [20]=1       Event bus is enabled
+       [21]=1       Parity is enabled
+       [22]=0       Shared accesses treated as noncacheable
+       [23]=0       HPROT is used
+       [24]=1       Abort generation of exclusive access disabled
+*/
+#define L210_AUX_CTRL_REG	0x01330241
+
+#endif
+
+#endif
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/comcerto-timers.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/comcerto-timers.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,172 @@
+/*
+ *  comcerto-timers.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_COMCERTO_TIMERS_H__
+#define __ASM_COMCERTO_TIMERS_H__
+
+/*
+ * TIMERS
+ */
+
+/* Kernel needs a timer cadenced to 10ms */
+#define COMCERTO_KERNEL_TIMER_VALUE	(COMCERTO_AHBCLK * 1000 * 1000 / HZ)
+#define machinecycles_to_usecs(ticks) ((ticks) / COMCERTO_AHBCLK)
+
+/*Hardware Timer API*/
+#define COMCERTO_TIMER_RUN_ONCE		(1 << 0)
+#define comcerto_timer_enable(t)	\
+	__raw_writel(__raw_readl(COMCERTO_TIMER_IRQ_MASK) | (1 << (t)), \
+						COMCERTO_TIMER_IRQ_MASK)
+
+#define comcerto_timer_disable(t)	\
+	__raw_writel(__raw_readl(COMCERTO_TIMER_IRQ_MASK) & ~(1 << (t)), \
+						COMCERTO_TIMER_IRQ_MASK)
+
+
+#define comcerto_timer0_set(hbound)	\
+		__raw_writel((hbound), COMCERTO_TIMER0_HIGH_BOUND)
+#define comcerto_timer0_get()		\
+		__raw_readl(COMCERTO_TIMER0_CURRENT_COUNT)
+
+#define comcerto_timer1_set(hbound)	\
+		__raw_writel((hbound) & 0x3FFFFFFF, COMCERTO_TIMER1_HIGH_BOUND)
+#define comcerto_timer1_get()		\
+		__raw_readl(COMCERTO_TIMER1_CURRENT_COUNT)
+
+#define comcerto_timer2_set(lbound, hbound, ctrl)  do {\
+		      __raw_writel((ctrl) & 0x1, COMCERTO_TIMER2_CTRL);	\
+		      __raw_writel((lbound), COMCERTO_TIMER2_LOW_BOUND); \
+		      __raw_writel((hbound), COMCERTO_TIMER2_HIGH_BOUND); \
+		   } while (0)
+
+#define comcerto_timer2_get()	__raw_readl(COMCERTO_TIMER2_CURRENT_COUNT)
+
+
+#define comcerto_timer3_set(lbound, hbound, ctrl)  do {	\
+			__raw_writel((ctrl) & 0x1, COMCERTO_TIMER3_CTRL); \
+			__raw_writel((lbound), COMCERTO_TIMER3_LOW_BOUND); \
+			__raw_writel((hbound), COMCERTO_TIMER3_HIGH_BOUND); \
+			} while (0)
+
+#define comcerto_timer3_get()	__raw_readl(COMCERTO_TIMER3_CURRENT_COUNT)
+
+#ifndef __ASSEMBLY__
+struct comcerto_timer {
+	unsigned long timeout;
+	void (*func) (unsigned long data);
+	unsigned long data;
+	u8 flags;
+	unsigned long thw;
+	struct hwtimer *hwt_p;
+};
+
+int timer_hw_handler(u8 id);
+int comcerto_timer_start(struct comcerto_timer *t);
+int comcerto_timer_stop(struct comcerto_timer *t);
+int comcerto_timer_read(struct comcerto_timer *t);
+
+#endif
+#endif
+/*
+ *  comcerto-timers.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_COMCERTO_TIMERS_H__
+#define __ASM_COMCERTO_TIMERS_H__
+
+/*
+ * TIMERS
+ */
+
+/* Kernel needs a timer cadenced to 10ms */
+#define COMCERTO_KERNEL_TIMER_VALUE	(COMCERTO_AHBCLK * 1000 * 1000 / HZ)
+#define machinecycles_to_usecs(ticks) ((ticks) / COMCERTO_AHBCLK)
+
+/*Hardware Timer API*/
+#define COMCERTO_TIMER_RUN_ONCE		(1 << 0)
+#define comcerto_timer_enable(t)	\
+	__raw_writel(__raw_readl(COMCERTO_TIMER_IRQ_MASK) | (1 << (t)), \
+						COMCERTO_TIMER_IRQ_MASK)
+
+#define comcerto_timer_disable(t)	\
+	__raw_writel(__raw_readl(COMCERTO_TIMER_IRQ_MASK) & ~(1 << (t)), \
+						COMCERTO_TIMER_IRQ_MASK)
+
+
+#define comcerto_timer0_set(hbound)	\
+		__raw_writel((hbound), COMCERTO_TIMER0_HIGH_BOUND)
+#define comcerto_timer0_get()		\
+		__raw_readl(COMCERTO_TIMER0_CURRENT_COUNT)
+
+#define comcerto_timer1_set(hbound)	\
+		__raw_writel((hbound) & 0x3FFFFFFF, COMCERTO_TIMER1_HIGH_BOUND)
+#define comcerto_timer1_get()		\
+		__raw_readl(COMCERTO_TIMER1_CURRENT_COUNT)
+
+#define comcerto_timer2_set(lbound, hbound, ctrl)  do {\
+		      __raw_writel((ctrl) & 0x1, COMCERTO_TIMER2_CTRL);	\
+		      __raw_writel((lbound), COMCERTO_TIMER2_LOW_BOUND); \
+		      __raw_writel((hbound), COMCERTO_TIMER2_HIGH_BOUND); \
+		   } while (0)
+
+#define comcerto_timer2_get()	__raw_readl(COMCERTO_TIMER2_CURRENT_COUNT)
+
+
+#define comcerto_timer3_set(lbound, hbound, ctrl)  do {	\
+			__raw_writel((ctrl) & 0x1, COMCERTO_TIMER3_CTRL); \
+			__raw_writel((lbound), COMCERTO_TIMER3_LOW_BOUND); \
+			__raw_writel((hbound), COMCERTO_TIMER3_HIGH_BOUND); \
+			} while (0)
+
+#define comcerto_timer3_get()	__raw_readl(COMCERTO_TIMER3_CURRENT_COUNT)
+
+#ifndef __ASSEMBLY__
+struct comcerto_timer {
+	unsigned long timeout;
+	void (*func) (unsigned long data);
+	unsigned long data;
+	u8 flags;
+	unsigned long thw;
+	struct hwtimer *hwt_p;
+};
+
+int timer_hw_handler(u8 id);
+int comcerto_timer_start(struct comcerto_timer *t);
+int comcerto_timer_stop(struct comcerto_timer *t);
+int comcerto_timer_read(struct comcerto_timer *t);
+
+#endif
+#endif
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/debug-macro.S
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/debug-macro.S	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,51 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/debug-macro.S
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#if defined(CONFIG_ARCH_M825XX1)
+#define UART_LSR	0x10
+#else
+#define UART_LSR	0x14
+#endif
+
+	.macro	addruart,rx
+	mrc	p15, 0, \rx, c1, c0
+	tst	\rx, #1			@ MMU enabled?
+	moveq	\rx, #0x10000000	@ physical base address
+	movne	\rx, #0xd0000000	@ virtual base
+	orr	\rx, \rx, #0x00090000	@ UART0
+	.endm
+
+	.macro	senduart,rd,rx
+	strb	\rd, [\rx, #0x00]
+	.endm
+
+	.macro	waituart,rd,rx
+1001:	ldrb	\rd, [\rx, #UART_LSR]
+	tst	\rd, #0x20		@ wait for THRE
+	beq	1001b
+	.endm
+
+	.macro	busyuart,rd,rx
+1001:	ldrb	\rd, [\rx, #UART_LSR]
+	and	\rd, \rd, #0x60
+	teq	\rd, #0x60		@ wait for TEMT and THRE
+	bne	1001b
+	.endm
+
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/debug.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/debug.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,67 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/debug.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef _DEBUG_H
+#define _DEBUG_H
+
+#include <linux/kernel.h>
+
+/* debug messages: to disable comment the next line */
+#define DEBUG_MSG
+
+/* several debug levels: 1 enables, 0 disables */
+
+#define DEBUG_ALWAYS 		1
+
+/* prints general information */
+#define DEBUG_INFO			1
+
+/* prints timing information */
+#define DEBUG_TIMING		0
+
+#define DEBUG_DISPLAY 		1
+
+#define VED_INIT_FUNC		1
+#define VED_RX_FUNC		0
+#define VED_TX_FUNC		0
+#define VED_STATE		0
+#define SMI_PART		0
+
+#define SKB_POOL_ERR		1
+#define SKB_POOL_INIT		0
+#define SKB_POOL_FUNC		0
+
+#define MSP_ERR			1
+#define MSP_INIT		0
+#define MSP_FUNC		0
+
+
+/* add other debug messages types here */
+
+/* the debug macro */
+#ifdef DEBUG_MSG
+#define info(fmt, args...) printk(KERN_INFO __FILE__ ": " fmt "\n" , ## args)
+#define PDEBUG(type, fmt, args...) \
+	do {if (type) info("%d: " fmt, __LINE__ , ## args); } while (0)
+#else
+#define PDEBUG(type, fmt, args...) do {} while (0)
+#endif
+
+#endif	/* _DEBUG_H */
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/dma.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/dma.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,28 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/dma.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARCH_DMA_H
+#define __ASM_ARCH_DMA_H
+
+#define MAX_DMA_ADDRESS		0xffffffff
+
+#define MAX_DMA_CHANNELS	0
+
+#endif /* _ASM_ARCH_DMA_H */
+
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/entry-macro.S
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/entry-macro.S	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,89 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/entry-macro.S
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <mach/hardware.h>
+
+#if defined(CONFIG_ARCH_COMCERTO)
+		.macro	disable_fiq
+		.endm
+
+		.macro  get_irqnr_preamble, base, tmp
+		.endm
+
+		.macro  arch_ret_to_user, tmp1, tmp2
+		.endm
+
+		.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+#if defined(CONFIG_ARCH_M829XX) || defined(CONFIG_ARCH_M821XX) || defined(CONFIG_ARCH_M822XX)
+
+		mov	\irqnr, #0
+		ldr	\base, =COMCERTO_INTC_CSP_IRQ_WNR
+		ldr	\tmp, [\base]
+		cmp	\tmp, #0
+		beq	10011f
+		cmp	\tmp, #32
+		movne	\irqnr, \tmp
+		bne	1004f
+
+#else		
+		mov	\irqnr, #0
+		ldr	\base, =COMCERTO_INTC_STATUS_REG_0
+		ldr	\tmp, =COMCERTO_INTC_CSP_IRQMASK_0
+		ldr	\irqstat, [\base]
+		ldr	\tmp, [\tmp]
+		ands	\irqstat, \irqstat, \tmp
+		beq	10011f
+
+               
+1002:		tst	\irqstat, #1
+		bne	1004f
+		add	\irqnr, \irqnr, #1
+		mov	\irqstat, \irqstat, lsr #1
+		cmp	\irqnr, #32
+		bcc	1002b
+#endif
+
+
+10011:                                                                
+		mov	\irqnr, #0
+		ldr	\base, =COMCERTO_INTC_STATUS_REG_1
+		ldr	\tmp, =COMCERTO_INTC_CSP_IRQMASK_1
+		ldr	\irqstat, [\base]
+		ldr	\tmp, [\tmp]
+		ands	\irqstat, \irqstat, \tmp
+		beq	1004f
+		
+		tst 	\irqstat, #0x2000
+		movne	\irqnr,#13
+		bne	1003f
+
+1001:	tst	\irqstat, #1
+		bne	1003f
+		add	\irqnr, \irqnr, #1
+		mov	\irqstat, \irqstat, lsr #1
+		cmp	\irqnr, #32
+		bcc	1001b
+1003:		add	\irqnr, \irqnr, #32
+                
+1004:
+		.endm
+
+                .macro  irq_prio_table
+                .endm
+#endif
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/hardware.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/hardware.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,67 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/hardware.h
+ *
+ *  Copyright (C) 2006 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#if !defined (AUTOCONF_INCLUDED)
+#include <linux/config.h>
+#endif
+
+	/***** Device *****/
+	#if defined(CONFIG_ARCH_M821XX)
+		#include <asm/arch/comcerto-100.h>
+	
+	#elif defined(CONFIG_ARCH_M822XX)
+		#include <asm/arch/comcerto-50.h>
+
+	#elif defined(CONFIG_ARCH_M828XX)
+		#include <asm/arch/comcerto-800.h>
+	
+	#elif defined(CONFIG_ARCH_M829XX)
+		#include <asm/arch/comcerto-900.h>
+
+	#else
+		#error "asm-arm/arch/hardware.h :  Unknown architecture" 
+	#endif
+	
+	/***** Board *****/
+	#if defined(CONFIG_EVM_ASIC)
+		#include <asm/arch/boards/board-asic.h>
+	
+	#elif defined(CONFIG_EVM_ROUTER)
+		#include <asm/arch/boards/board-router.h>
+	
+	#elif defined(CONFIG_EVM_PACKET_IAD)
+		#include <asm/arch/boards/board-packet_iad.h>
+	
+	#elif defined(CONFIG_EVM_SUPERMOMBASA)
+		#include <asm/arch/boards/board-nairobi.h>
+		
+	#elif defined(CONFIG_EVM_FEROUTER)
+		#include <asm/arch/boards/board-ferouter.h>
+	
+	#else
+		#error "asm-arm/arch/hardware.h :  Unknown board"
+	#endif
+
+	#include <asm/arch/comcerto-common.h>
+
+#endif
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/io.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/io.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,431 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/io.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#include <linux/io.h>
+#include <mach/hardware.h>
+
+#if !defined(CONFIG_PCI)
+
+#define __io(a)		((void __iomem *)(a))
+#define __mem_pci(a)	(a)
+
+#else
+
+#define PCI_SPACE_TYPE_CONFIG_TYPE0	0x1
+#define PCI_SPACE_TYPE_CONFIG_TYPE1	0x2
+#define PCI_SPACE_TYPE_IO		0x3
+#define PCI_SPACE_TYPE_MEM		0x4
+
+#if defined(CONFIG_COMCERTO_PCI_SINGLE_ACCESS_TYPE)
+
+#define __mem_pci(a)	(a)
+
+#define outb(v, p)	outb_not_supported
+#define outw(v, p)	outw_not_supported
+#define outl(v, p)	outl_not_supported
+
+#define inb(p)		inb_not_supported
+#define inw(p)		inw_not_supported
+#define inl(p)		inl_not_supported
+
+#define outsb(p, d, l)	outsb_not_supported
+#define outsw(p, d, l)	outsw_not_supported
+#define outsl(p, d, l)	outsl_not_supporte
+
+#define insb(p, d, l)	insb_not_supportedi
+#define insw(p, d, l)	insw_not_supported
+#define insl(p, d, l)	insl_not_supported
+
+#else
+
+#define __comcerto_io(a)	(a)
+#define __comcerto_mem_pci(a)	(a)
+
+extern u8 comcerto_pci_readb(u32 addr, u8 space_type);
+extern u16 comcerto_pci_readw(u32 addr, u8 space_type);
+extern u32 comcerto_pci_readl(u32 addr, u8 space_type);
+
+extern void comcerto_pci_writeb(u32 addr, u8 value, u8 space_type);
+extern void comcerto_pci_writew(u32 addr, u16 value, u8 space_type);
+extern void comcerto_pci_writel(u32 addr, u32 value, u8 space_type);
+
+#define IS_PCI_MEM_PADDR(addr)	\
+	(((unsigned long)(addr) >= COMCERTO_PCI_MEM_BASE) && \
+	 ((unsigned long)(addr) <= (COMCERTO_PCI_MEM_BASE + \
+				COMCERTO_PCI_MEM_SIZE)))
+
+#define IS_PCI_MEM_VADDR(addr)	\
+	(((unsigned long)(addr) >= COMCERTO_PCI_MEM_VBASE) && \
+	 ((unsigned long)(addr) <= (COMCERTO_PCI_MEM_VBASE + \
+				COMCERTO_PCI_MEM_SIZE)))
+
+#define IS_PCI_IO_PADDR(addr)	\
+	(((unsigned long)(addr) >= COMCERTO_PCI_IO_BASE) && \
+	((unsigned long)(addr) <= (COMCERTO_PCI_IO_BASE + \
+					COMCERTO_PCI_IO_SIZE)))
+
+#define IS_PCI_IO_VADDR(addr)	\
+	(((unsigned long)(addr) >= COMCERTO_PCI_IO_VBASE) && \
+	((unsigned long)(addr) <= (COMCERTO_PCI_IO_VBASE + \
+					COMCERTO_PCI_IO_SIZE)))
+
+
+#if defined(CONFIG_COMCERTO_PCI_USE_APBB)
+#define __iomem_to_pci(virt)	((unsigned long)(virt))
+#define __ioport_to_pci(phy)	((unsigned long)(phy) - COMCERTO_PCI_MEM_BASE \
+						+ COMCERTO_PCI_MEM_VBASE)
+#else
+#define __iomem_to_pci(virt)	((unsigned long)(virt) - \
+			COMCERTO_PCI_MEM_VBASE + COMCERTO_PCI_MEM_BASE)
+#define __ioport_to_pci(phy)	((unsigned long)(phy))
+#endif
+
+#define __pci_to_iomem(phy)	\
+	((void __iomem *)((phy) - \
+		COMCERTO_PCI_MEM_BASE + COMCERTO_PCI_MEM_VBASE))
+
+static
+inline void __comcerto_outsb(unsigned int port, const void *data, int bytelen)
+{
+	unsigned char *datap = (unsigned char *)data;
+	while (bytelen--)
+		comcerto_pci_writeb(__ioport_to_pci(port), *(datap)++, \
+							PCI_SPACE_TYPE_IO);
+}
+
+static inline void __comcerto_outsw(unsigned int port, const void *data, \
+								int wordlen)
+{
+	unsigned short *datap = (unsigned short *)data;
+	while (wordlen--)
+		comcerto_pci_writew(__ioport_to_pci(port), *(datap)++, \
+							PCI_SPACE_TYPE_IO);
+}
+
+static inline void __comcerto_outsl(unsigned int port, const void *data, \
+								int longlen)
+{
+	unsigned int *datap = (unsigned int *)data;
+	while (longlen--)
+		comcerto_pci_writel(__ioport_to_pci(port), *(datap)++, \
+							PCI_SPACE_TYPE_IO);
+}
+
+static inline void __comcerto_insb(unsigned int port, void *data, int bytelen)
+{
+	unsigned char *datap = (unsigned char *)data;
+	while (bytelen--)
+		*(datap)++ = comcerto_pci_readb(__ioport_to_pci(port), \
+							PCI_SPACE_TYPE_IO);
+}
+
+static inline void __comcerto_insw(unsigned int port, void *data, int wordlen)
+{
+	unsigned short *datap = (unsigned short *)data;
+	while (wordlen--)
+		*(datap)++ = comcerto_pci_readw(__ioport_to_pci(port), \
+							PCI_SPACE_TYPE_IO);
+}
+
+static inline void __comcerto_insl(unsigned int port, void *data, int longlen)
+{
+	unsigned int *datap = (unsigned int *)data;
+	while (longlen--)
+		*(datap)++ = comcerto_pci_readl(__ioport_to_pci(port), \
+							PCI_SPACE_TYPE_IO);
+}
+
+static inline void __comcerto_writesb(void __iomem *addr, const void *data, \
+								int bytelen)
+{
+	unsigned char *datap = (unsigned char *)data;
+	if (IS_PCI_MEM_VADDR(addr))
+		while (bytelen--)
+			comcerto_pci_writeb(__iomem_to_pci(addr), \
+					*(datap)++, PCI_SPACE_TYPE_MEM);
+	else
+		__raw_writesb(addr, data, bytelen);
+}
+
+static inline void __comcerto_writesw(void __iomem *addr, const void *data, \
+								int wordlen)
+{
+	unsigned short *datap = (unsigned short *)data;
+	if (IS_PCI_MEM_VADDR(addr))
+		while (wordlen--)
+			comcerto_pci_writew(__iomem_to_pci(addr), \
+					*(datap)++, PCI_SPACE_TYPE_MEM);
+	else
+		__raw_writesw(addr, data, wordlen);
+}
+
+static inline
+void __comcerto_writesl(void __iomem *addr, const void *data, int longlen)
+{
+	unsigned int *datap = (unsigned int *)data;
+	if (IS_PCI_MEM_VADDR(addr))
+		while (longlen--)
+			comcerto_pci_writel(__iomem_to_pci(addr), *(datap)++, \
+							PCI_SPACE_TYPE_MEM);
+	else
+		__raw_writesl(addr, data, longlen);
+}
+
+static inline
+void __comcerto_readsb(void __iomem *addr, void *data, int bytelen)
+{
+	unsigned char *datap = (unsigned char *)data;
+	if (IS_PCI_MEM_VADDR(addr))
+		while (bytelen--)
+			*(datap)++ = comcerto_pci_readb(__iomem_to_pci(addr), \
+							PCI_SPACE_TYPE_MEM);
+	else
+		__raw_readsb(addr, data, bytelen);
+}
+
+static inline
+void __comcerto_readsw(void __iomem *addr, void *data, int wordlen)
+{
+	unsigned short *datap = (unsigned short *)data;
+	if (IS_PCI_MEM_VADDR(addr))
+		while (wordlen--)
+			*(datap)++ = comcerto_pci_readw(__iomem_to_pci(addr), \
+							PCI_SPACE_TYPE_MEM);
+	else
+		__raw_readsw(addr, data, wordlen);
+}
+
+static inline
+void __comcerto_readsl(void __iomem *addr, void *data, int longlen)
+{
+	unsigned int *datap = (unsigned int *)data;
+	if (IS_PCI_MEM_VADDR(addr))
+		while (longlen--)
+			*(datap)++ = comcerto_pci_readl(__iomem_to_pci(addr), \
+							PCI_SPACE_TYPE_MEM);
+	else
+		__raw_readsl(addr, data, longlen);
+}
+
+
+#define __comcerto_outb(v, a)	\
+	(comcerto_pci_writeb(__ioport_to_pci(a), (v), PCI_SPACE_TYPE_IO))
+#define __comcerto_outw(v, a)	\
+	(comcerto_pci_writew(__ioport_to_pci(a), (v), PCI_SPACE_TYPE_IO))
+#define __comcerto_outl(v, a)	\
+	(comcerto_pci_writel(__ioport_to_pci(a), (v), PCI_SPACE_TYPE_IO))
+#define __comcerto_inb(a)	\
+	(comcerto_pci_readb(__ioport_to_pci(a), PCI_SPACE_TYPE_IO))
+#define __comcerto_inw(a)	\
+	(comcerto_pci_readw(__ioport_to_pci(a), PCI_SPACE_TYPE_IO))
+#define __comcerto_inl(a)	\
+	(comcerto_pci_readl(__ioport_to_pci(a), PCI_SPACE_TYPE_IO))
+
+#define __comcerto_writeb(v, a)	\
+		(IS_PCI_MEM_VADDR(a) ? \
+		comcerto_pci_writeb(__iomem_to_pci(a), (v), PCI_SPACE_TYPE_MEM)\
+		 : __raw_writeb((v), (a)))
+
+#define __comcerto_writew(v, a)	\
+	(IS_PCI_MEM_VADDR(a) ? \
+	 comcerto_pci_writew(__iomem_to_pci(a), (v), PCI_SPACE_TYPE_MEM) :\
+	 __raw_writew((v), (a)))
+
+#define __comcerto_writel(v, a)	\
+	(IS_PCI_MEM_VADDR(a) ? \
+	 comcerto_pci_writel(__iomem_to_pci(a), (v), PCI_SPACE_TYPE_MEM) : \
+	 __raw_writel((v), (a)))
+
+#define __comcerto_readb(a)	\
+	(IS_PCI_MEM_VADDR(a) ? \
+	 comcerto_pci_readb(__iomem_to_pci(a), PCI_SPACE_TYPE_MEM) : \
+	 __raw_readb(a))
+
+#define __comcerto_readw(a)	\
+	(IS_PCI_MEM_VADDR(a) ? \
+	 comcerto_pci_readw(__iomem_to_pci(a), PCI_SPACE_TYPE_MEM) :\
+	 __raw_readw(a))
+
+#define __comcerto_readl(a)	\
+	(IS_PCI_MEM_VADDR(a) ? \
+	 comcerto_pci_readl(__iomem_to_pci(a), PCI_SPACE_TYPE_MEM) : \
+	 __raw_readl(a))
+
+#define __comcerto_iowrite8(v, a)	\
+	(IS_PCI_IO_VADDR(a) ? \
+	 comcerto_pci_writeb(__iomem_to_pci(a), (v), PCI_SPACE_TYPE_IO) : \
+	 __comcerto_writeb((v), (a)))
+
+#define __comcerto_iowrite16(v, a)	\
+	(IS_PCI_IO_VADDR(a) ? \
+	 comcerto_pci_writew(__iomem_to_pci(a), (v), PCI_SPACE_TYPE_IO) : \
+	 __comcerto_writew((v), (a)))
+
+#define __comcerto_iowrite32(v, a)	\
+	(IS_PCI_IO_VADDR(a) ? \
+	 comcerto_pci_writel(__iomem_to_pci(a), (v), PCI_SPACE_TYPE_IO) : \
+	 __comcerto_writel((v), (a)))
+
+#define __comcerto_ioread8(a)	\
+	(IS_PCI_IO_VADDR(a) ? \
+	 comcerto_pci_readb(__iomem_to_pci(a), PCI_SPACE_TYPE_IO) : \
+	 __comcerto_readb(a))
+
+#define __comcerto_ioread16(a)	\
+	(IS_PCI_IO_VADDR(a) ? \
+	 comcerto_pci_readw(__iomem_to_pci(a), PCI_SPACE_TYPE_IO) : \
+	 __comcerto_readw(a))
+
+#define __comcerto_ioread32(a)	\
+	(IS_PCI_IO_VADDR(a) ? \
+	 comcerto_pci_readl(__iomem_to_pci(a), PCI_SPACE_TYPE_IO) :\
+	 __comcerto_readl(a))
+
+static inline void
+__iomem *__comcerto_ioremap(unsigned long cookie, size_t size, \
+						unsigned long flag)
+{
+	if (IS_PCI_MEM_PADDR(cookie))
+		return __pci_to_iomem(cookie);
+	else
+		return __arm_ioremap(cookie, size, flag);
+}
+
+static inline void __comcerto_iounmap(void __iomem *addr)
+{
+	if (!IS_PCI_MEM_VADDR(addr))
+		__iounmap(addr);
+}
+
+static inline void
+__iomem *__comcerto_ioport_map(unsigned long port, unsigned int nr)
+{
+	return __pci_to_iomem(port);
+}
+
+static inline void __comcerto_ioport_unmap(void __iomem *addr)
+{
+	return;
+}
+
+
+/*
+ *  IO port access primitives
+ *  -------------------------
+ */
+
+#define outb(v, p)	__comcerto_outb((__u8)v, __comcerto_io(p))
+#define outw(v, p)	__comcerto_outw((__force __u16) \
+		cpu_to_le16(v), __comcerto_io(p))
+#define outl(v, p)	__comcerto_outl((__force __u32) \
+		cpu_to_le32(v), __comcerto_io(p))
+
+#define inb(p)		({ __u8 __v = __comcerto_inb(__comcerto_io(p)); __v; })
+#define inw(p)		({ __u16 __v = le16_to_cpu((__force __le16) \
+			__comcerto_inw(__comcerto_io(p))); __v; })
+#define inl(p)		({ __u32 __v = le32_to_cpu((__force __le32) \
+			__comcerto_inl(__comcerto_io(p))); __v; })
+
+#define outsb(p, d, l)	__comcerto_outsb(__comcerto_io(p), d, l)
+#define outsw(p, d, l)	__comcerto_outsw(__comcerto_io(p), d, l)
+#define outsl(p, d, l)	__comcerto_outsl(__comcerto_io(p), d, l)
+
+#define insb(p, d, l)	__comcerto_insb(__comcerto_io(p), d, l)
+#define insw(p, d, l)	__comcerto_insw(__comcerto_io(p), d, l)
+#define insl(p, d, l)	__comcerto_insl(__comcerto_io(p), d, l)
+
+/*
+ *  Memory access primitives
+ *  ------------------------
+ */
+
+#define readb(c) ({ __u8 __v = __comcerto_readb(__comcerto_mem_pci(c)); __v; })
+#define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \
+			__comcerto_readw(__comcerto_mem_pci(c))); __v; })
+#define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \
+			__comcerto_readl(__comcerto_mem_pci(c))); __v; })
+
+#define readb_relaxed(addr) readb(addr)
+#define readw_relaxed(addr) readw(addr)
+#define readl_relaxed(addr) readl(addr)
+
+#define readsb(p, d, l)		__comcerto_readsb(__comcerto_mem_pci(p), d, l)
+#define readsw(p, d, l)		__comcerto_readsw(__comcerto_mem_pci(p), d, l)
+#define readsl(p, d, l)		__comcerto_readsl(__comcerto_mem_pci(p), d, l)
+
+#define writeb(v, c)		__comcerto_writeb(v, __comcerto_mem_pci(c))
+#define writew(v, c)		__comcerto_writew((__force __u16) \
+		cpu_to_le16(v), __comcerto_mem_pci(c))
+#define writel(v, c)		__comcerto_writel((__force __u32) \
+		cpu_to_le32(v), __comcerto_mem_pci(c))
+
+#define writesb(p, d, l)	\
+		__comcerto_writesb(__comcerto_mem_pci(p), d, l)
+#define writesw(p, d, l)	\
+		__comcerto_writesw(__comcerto_mem_pci(p), d, l)
+#define writesl(p, d, l)	\
+		__comcerto_writesl(__comcerto_mem_pci(p), d, l)
+
+#define memset_io(c, v, l)	_memset_io(__comcerto_mem_pci(c), (v), (l))
+#define memcpy_fromio(a, c, l)	_memcpy_fromio((a), __comcerto_mem_pci(c), (l))
+#define memcpy_toio(c, a, l)	_memcpy_toio(__comcerto_mem_pci(c), (a), (l))
+
+/*
+ * ioremap and friends.
+ */
+
+#define __arch_ioremap(cookie, size, flag)	\
+		__comcerto_ioremap((cookie), (size), (flag))
+#define __arch_iounmap(cookie)			\
+		__comcerto_iounmap(cookie)
+
+/*
+ * io{read, write}{8,16,32} macros
+ */
+
+#define ioread8(p)	\
+	({ unsigned int __v = __comcerto_ioread8(p); __v; })
+#define ioread16(p)	\
+	({ unsigned int __v = le16_to_cpu(__comcerto_ioread16(p)); __v; })
+#define ioread32(p)	\
+	({ unsigned int __v = le32_to_cpu(__comcerto_ioread32(p)); __v; })
+
+#define iowrite8(v, p)	__comcerto_iowrite8(v, p)
+#define iowrite16(v, p)	__comcerto_iowrite16(cpu_to_le16(v), p)
+#define iowrite32(v, p)	__comcerto_iowrite32(cpu_to_le32(v), p)
+
+
+#define ioread8_rep(p, d, c)	readsb(p, d, c)
+#define ioread16_rep(p, d, c)	readsw(p, d, c)
+#define ioread32_rep(p, d, c)	readsl(p, d, c)
+
+#define iowrite8_rep(p, s, c)	writesb(p, s, c)
+#define iowrite16_rep(p, s, c)	writesw(p, s, c)
+#define iowrite32_rep(p, s, c)	writesl(p, s, c)
+
+#define ioport_map(c, s)		__comcerto_ioport_map(c, s)
+#define ioport_unmap(addr)	__comcerto_ioport_unmap(addr)
+
+#endif /* defined(CONFIG_COMCERTO_PCI_SINGLE_ACCESS_TYPE) */
+#endif /* !defined(CONFIG_PCI) */
+
+#endif /* __ASM_ARM_ARCH_IO_H */
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/irqs.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/irqs.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,17 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/irqs.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+#include <mach/hardware.h>
+
+#endif  /* __ASM_ARCH_IRQS_H */
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/memory.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/memory.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,31 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/memory.h
+ *
+ *  Copyright (C) 2006 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __MACH_MEMORY_H
+#define __MACH_MEMORY_H
+
+#include <mach/hardware.h>
+
+#define PHYS_OFFSET	COMCERTO_SDRAM_BASE
+
+#define __virt_to_bus(x)		__virt_to_phys(x)
+#define __bus_to_virt(x)		__phys_to_virt(x)
+
+#endif
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/serial.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/serial.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,23 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/serial.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARCH_SERIAL_H
+#define __ASM_ARCH_SERIAL_H
+
+#endif /* __ASM_ARCH_SERIAL_H */
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/system.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/system.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,46 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/system.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+#include <mach/hardware.h>
+#include <linux/io.h>
+
+static inline void arch_idle(void)
+{
+	/*
+	 * This should do all the clock switching
+	 * and wait for interrupt tricks
+	 */
+	cpu_do_idle();
+}
+
+static inline void arch_reset(char mode)
+{
+	unsigned int val;
+
+	while (1) {
+		val = __raw_readl(COMCERTO_PHI_APB_FIFO_INTACK);
+		val |= 0x0100;
+		__raw_writel(val, COMCERTO_PHI_APB_FIFO_INTACK);
+	}
+}
+
+#endif /* __ASM_ARCH_SYSTEM_H */
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/timex.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/timex.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,28 @@
+/*
+ *  linux/include/arch/arm/mach-comcerto/include/mach/timex.h
+ *
+ *  Copyright (C) 2006 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H__
+#define __ASM_ARCH_TIMEX_H__
+
+#include <mach/hardware.h>
+
+#define CLOCK_TICK_RATE			(COMCERTO_AHBCLK * 1000 * 1000)
+
+#endif
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/uncompress.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/uncompress.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,61 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/uncompress.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+/* Tx/Rx Register */
+#define COMCERTO_UART0_DR	(*(unsigned long *)0x10090000)
+/* Status register */
+#define M825XX1_UART0_SSR	(*(unsigned long *)0x10090010)
+/* Line Status Register (read only) */
+#define COMCERTO_UART0_LSR	(*(unsigned long *)0x10090014)
+
+
+#if defined(CONFIG_ARCH_M821XX)
+#define UART_DR		COMCERTO_UART0_DR
+#define UART_LSR	COMCERTO_UART0_LSR
+#else
+#define UART_DR		COMCERTO_UART0_DR
+#define UART_LSR	M825XX1_UART0_SSR
+#endif
+
+static inline void putc(int c)
+{
+	while (!(UART_LSR & 0x20))
+		barrier();
+	UART_DR = c;
+}
+
+/*
+ * nothing to do
+ */
+static inline void flush(void)
+{
+}
+
+static inline void arch_decomp_setup(void)
+{
+}
+
+static inline void arch_decomp_wdog(void)
+{
+}
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff -r 0486c1bf2100 -r 312d5194b3dc arch/arm/mach-comcerto/include/mach/vmalloc.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/arch/arm/mach-comcerto/include/mach/vmalloc.h	Mon Aug 10 16:58:46 2009 -0500
@@ -0,0 +1,21 @@
+/*
+ *  linux/include/asm-arm/arch-comcerto/vmalloc.h
+ *
+ *  Copyright (C) 2004,2005 Mindspeed Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#define VMALLOC_END       (0xE0000000)
