diff -r 1b6ce0c5a3ad arch/arm/Makefile
--- a/arch/arm/Makefile	Thu Aug 27 11:18:19 2009 -0500
+++ b/arch/arm/Makefile	Thu Aug 27 11:19:56 2009 -0500
@@ -123,9 +123,8 @@
     plat-$(CONFIG_PLAT_IOP)	   := iop
  machine-$(CONFIG_ARCH_COMCERTO)   := comcerto
 ifeq ($(CONFIG_ARCH_COMCERTO),y)
-# First 8MB of memory (ZONE_DMA) are l2 non-cacheable
-# Move kernel 8MB higher in order the kernel code to be l2 cacheable
- textofs-$(CONFIG_ARCH_COMCERTO)	   := 0x00C08000
+# Adjust kernel for L2-uncacheable DMA window
+ textofs-$(CONFIG_ARCH_COMCERTO) := $(shell perl -e 'printf "0x%03x08000", ${CONFIG_COMCERTO_L2_UNCACHEABLE}')
 endif
  machine-$(CONFIG_ARCH_IXP4XX)	   := ixp4xx
  machine-$(CONFIG_ARCH_IXP2000)    := ixp2000
diff -r 1b6ce0c5a3ad arch/arm/include/asm/mach/map.h
--- a/arch/arm/include/asm/mach/map.h	Thu Aug 27 11:18:19 2009 -0500
+++ b/arch/arm/include/asm/mach/map.h	Thu Aug 27 11:19:56 2009 -0500
@@ -27,6 +27,7 @@
 #define MT_MEMORY		9
 #define MT_ROM			10
 #define MT_MEMORY_NONCACHED	11
+#define MT_DMA_MEMORY		12
 
 #ifdef CONFIG_MMU
 extern void iotable_init(struct map_desc *, int);
diff -r 1b6ce0c5a3ad arch/arm/mach-comcerto/Kconfig
--- a/arch/arm/mach-comcerto/Kconfig	Thu Aug 27 11:18:19 2009 -0500
+++ b/arch/arm/mach-comcerto/Kconfig	Thu Aug 27 11:19:56 2009 -0500
@@ -134,6 +134,14 @@
 	help
 	  Say Y if you intend to run M821XX TDM and have opportunity 
 	  to change different parameters	
+
+config COMCERTO_L2_UNCACHEABLE
+       int "Size of L2-uncacheable DMA zone in MB"
+       default 12
+       help
+         This sets the size of the L2 uncacheable DMA window and
+         kernel offset in physical memory.
+
 endmenu
 
 endif
diff -r 1b6ce0c5a3ad arch/arm/mach-comcerto/comcerto-100.c
--- a/arch/arm/mach-comcerto/comcerto-100.c	Thu Aug 27 11:18:19 2009 -0500
+++ b/arch/arm/mach-comcerto/comcerto-100.c	Thu Aug 27 11:19:56 2009 -0500
@@ -98,9 +98,10 @@
  * Adjust zones to have x MB in DMA zone (We only allocate entire sections for
  * the DMA ZONE).
  */
- void __init comcerto_adjust_zones(int node, unsigned long *zone_size, unsigned long *zhole_size)
+void __init comcerto_adjust_zones(int node, unsigned long *zone_size,
+				  unsigned long *zhole_size)
 {
-	unsigned int sz = ((__pa(swapper_pg_dir) & SECTION_MASK) - PHYS_OFFSET) >> PAGE_SHIFT;
+	unsigned int sz = CONFIG_COMCERTO_L2_UNCACHEABLE << 8;
 
 	if (node || (zone_size[0] <= sz))
 		return;
@@ -541,7 +542,7 @@
 
 #if defined(CONFIG_CACHE_L2X0)
 	/*L2 Cache Configuration (if needed, to check) */
-	l2x0_init((void*)COMCERTO_L2CC_VADDR_BASE, L210_AUX_CTRL_REG, 0);
+	l2x0_init((void*)COMCERTO_L2CC_VADDR_BASE, COMCERTO_L2CC_AUX_MASK, 0);
 #endif
 
 	idma_init();
diff -r 1b6ce0c5a3ad arch/arm/mach-comcerto/include/mach/comcerto-common.h
--- a/arch/arm/mach-comcerto/include/mach/comcerto-common.h	Thu Aug 27 11:18:19 2009 -0500
+++ b/arch/arm/mach-comcerto/include/mach/comcerto-common.h	Thu Aug 27 11:19:56 2009 -0500
@@ -41,6 +41,8 @@
 #define COMCERTO_L2CC_VADDR_BASE	0xfa0a0000
 #define COMCERTO_IPSEC_VADDR_BASE	0xfe000000
 
+#define COMCERTO_L2CC_AUX_MASK 0x01330241
+
 /* macro to get virtual address of IO on APB Bus from Physical address*/
 #define APB_VADDR(x)		((x) - APB_PADDR_BASE + APB_VADDR_BASE)
 
diff -r 1b6ce0c5a3ad arch/arm/mach-comcerto/include/mach/memory.h
--- a/arch/arm/mach-comcerto/include/mach/memory.h	Thu Aug 27 11:18:19 2009 -0500
+++ b/arch/arm/mach-comcerto/include/mach/memory.h	Thu Aug 27 11:19:56 2009 -0500
@@ -28,4 +28,9 @@
 #define __virt_to_bus(x)		__virt_to_phys(x)
 #define __bus_to_virt(x)		__phys_to_virt(x)
 
+#ifndef __ASSEMBLER__
+extern void comcerto_adjust_zones(int node, unsigned long *zone_size, unsigned long *zhole_size);
+#define arch_adjust_zones comcerto_adjust_zones
 #endif
+
+#endif
diff -r 1b6ce0c5a3ad arch/arm/mm/Kconfig
--- a/arch/arm/mm/Kconfig	Thu Aug 27 11:18:19 2009 -0500
+++ b/arch/arm/mm/Kconfig	Thu Aug 27 11:19:56 2009 -0500
@@ -747,7 +747,7 @@
 config CACHE_L2X0
 	bool "Enable the L2x0 outer cache controller"
 	depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
-		   REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31
+		   REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || ARCH_COMCERTO
 	default y
 	select OUTER_CACHE
 	help
diff -r 1b6ce0c5a3ad arch/arm/mm/init.c
--- a/arch/arm/mm/init.c	Thu Aug 27 11:18:19 2009 -0500
+++ b/arch/arm/mm/init.c	Thu Aug 27 11:19:56 2009 -0500
@@ -245,26 +245,19 @@
 			WARN_ON(bank->start != PHYS_OFFSET);
 			map.pfn = __phys_to_pfn(bank->start);
 			map.virtual = __phys_to_virt(bank->start);
-			map.length = (__pa(swapper_pg_dir) & SECTION_MASK) - PHYS_OFFSET;
+			map.length = CONFIG_COMCERTO_L2_UNCACHEABLE << 20;
 			map.type = MT_DMA_MEMORY;
 			create_mapping(&map);
-			
+
 			bank->start += map.length;
 			bank->size -= map.length;
+			map_memory_bank(bank);
+			bank->start -= map.length;
+			bank->size += map.length;
+			continue;
 		}
 #endif
 		map_memory_bank(bank);
-
-/* We want to change the MMU settings for the DMA ZONE, but not the actual 
-   memory bank descriptions, so we restore the initial settings once the
-   specific mapping is done.
- */
-#if defined(CONFIG_ARCH_COMCERTO) && defined(CONFIG_CACHE_L2X0)
-		if (node == 0 && i == 0) {
-			bank->start -= (__pa(swapper_pg_dir) & SECTION_MASK) - PHYS_OFFSET;
-			bank->size += (__pa(swapper_pg_dir) & SECTION_MASK) - PHYS_OFFSET;
-		}
-#endif
 	}
 
 	/*
@@ -536,7 +529,9 @@
 
 #if defined(CONFIG_ARCH_COMCERTO) && defined(CONFIG_CACHE_L2X0)
 	/* now that our DMA memory is actually so designated, we can free it */
-	free_area(PAGE_OFFSET, (unsigned long)swapper_pg_dir & SECTION_MASK, NULL);
+	totalram_pages += free_area(PHYS_PFN_OFFSET, PHYS_PFN_OFFSET +
+				    (CONFIG_COMCERTO_L2_UNCACHEABLE << 8),
+				    NULL);
 #endif
 #ifdef CONFIG_HIGHMEM
 	/* set highmem page free */
