diff -Naur linux-2.6.30.4-orig/drivers/spi/comcerto_spi.c linux-2.6.30.4-new/drivers/spi/comcerto_spi.c
--- linux-2.6.30.4-orig/drivers/spi/comcerto_spi.c	2010-06-02 13:31:28.128035000 -0700
+++ linux-2.6.30.4-new/drivers/spi/comcerto_spi.c	2010-06-08 22:55:29.878761000 -0700
@@ -59,6 +59,7 @@
 	unsigned long membase;
 	int irq;
 	unsigned long clock_rate;
+	spinlock_t lock;
 };
 
 static void transfer(struct spi_device *spi, struct spi_transfer *xfer)
@@ -92,13 +93,14 @@
 	__raw_writel(0, mb + COMCERTO_SPI_SSIENR);
 	__raw_writel(ctrlr0, mb + COMCERTO_SPI_CTRLR0);
 	__raw_writel(baudr, mb + COMCERTO_SPI_BAUDR);
-	__raw_writel(spi->chip_select, mb + COMCERTO_SPI_SER);
+	__raw_writel(1 << (spi->chip_select), mb + COMCERTO_SPI_SER);
 	__raw_writel(0, mb + COMCERTO_SPI_RXFTLR);
 	__raw_writel(0, mb + COMCERTO_SPI_TXFTLR);
 	__raw_writel(0, mb + COMCERTO_SPI_IMR);
 	__raw_writel(1, mb + COMCERTO_SPI_SSIENR);
 
 	len = xfer->len;
+
 #if 0
 	printk("[%d/%d%s%s%d", spi->chip_select,
 	       (unsigned int)spi->controller_data,
@@ -159,13 +161,17 @@
 static int comcerto_spi_transfer(struct spi_device *spi,
 				 struct spi_message *msg)
 {
+	struct comcerto_spi *c = spi_master_get_devdata(spi->master);
 	struct spi_transfer *xfer;
+	unsigned long flags;
 	int gpio_pin = (unsigned int)spi->controller_data;
 	int gpio_dir = spi->mode & SPI_CS_HIGH;
 
 	if (list_empty(&msg->transfers))
 		return -EINVAL;
 
+	spin_lock_irq(&c->lock);
+
 	/* drive stable GPIO chip select */
 	if (gpio_pin) {
 		comcerto_gpio_enable_output(gpio_pin);
@@ -188,7 +194,10 @@
 			comcerto_gpio_set_1(gpio_pin);
 	}
 
+	spin_unlock_irq(&c->lock);
+
 	msg->complete(msg->context);
+
 	return 0;
 }
 
@@ -208,7 +217,7 @@
 		return -ENODEV;
 
 	master->transfer = comcerto_spi_transfer;
-	master->num_chipselect = 8;
+	master->num_chipselect = 4;
 	master->bus_num = pdev->id;
 	master->setup = comcerto_spi_setup;
 	platform_set_drvdata(pdev, master);
@@ -226,9 +235,10 @@
 	c->membase = APB_VADDR(pdev->resource[0].start);
 	c->irq = pdev->resource[1].start;
 	c->clock_rate = (COMCERTO_AHBCLK * 1000000);
+	spin_lock_init(&c->lock);
 
 	/* enable SPI bus */
-	comcerto_gpio_ctrl(0x3 << 4, 0x3 << 4);
+	comcerto_gpio_ctrl(SPI_BUS, SPI_BUS);		// SPI_BUS = 0x200
 	writel(0, c->membase + COMCERTO_SPI_SSIENR);
 	writel(0, c->membase + COMCERTO_SPI_IMR);
 
@@ -247,7 +257,7 @@
 
 	writel(0, c->membase + COMCERTO_SPI_SSIENR);
 	writel(0, c->membase + COMCERTO_SPI_IMR);
-	comcerto_gpio_ctrl(0x0 << 4, 0x3 << 4);
+	comcerto_gpio_ctrl(0, SPI_BUS);		// SPI_BUS = 0x200
 	base = pdev->resource[0].start;
 	len = pdev->resource[0].end - pdev->resource[0].start + 1;
 	release_mem_region(base, len);
